AMD Ryzen Threadripper 3000 Zen 2

AMD Ryzen Threadripper 3000 Zen 2 Powered HEDT CPUs To Come In TRX4 Quad-Channel & WRX8 Octa-Channel Flavors
The TRX4 HEDT platform would feature quad-channel memory, UDIMM memory support with 2 DIMMs per channel and up to 256 GB of capacity per channel. This means that the platform will support up to 1 TB of memory. There would also be support for 64 Gen 4 PCIe lanes with 16 lanes switchable with the SATA interface.
https://wccftech.com/amd-ryzen-threadripper-3000-cpu-trx4-wrx8-quad-octa-channel-memory-support/

Soooo...what's the question?

AMD Ryzen Threadripper 3000 Zen 2 Powered HEDT CPUs To Come In TRX4 Quad-Channel & WRX8 Octa-Channel Flavors
The TRX4 HEDT platform would feature quad-channel memory, UDIMM memory support with 2 DIMMs per channel and up to 256 GB of capacity per channel. This means that the platform will support up to 1 TB of memory. There would also be support for 64 Gen 4 PCIe lanes with 16 lanes switchable with the SATA interface.
https://wccftech.com/amd-ryzen-threadripper-3000-cpu-trx4-wrx8-quad-octa-channel-memory-support/

The big question will be at what core count does the X and WX split take place.

I'd be shocked if the X line actually supports 1TB of memory. Proper support for that much memory will add a lot of cost, and almost no one will need anywhere close to that much memory. Database servers are really the only common use cases that can benefit from that much memory.

and almost no one will use need anywhere close to that much memory.

also...
"640K ought to be enough for anyone"

Does Davinci use all those Threadripper cores?

Does Davinci use all those Threadripper cores?

As with any software as diverse as DR, it depends on what you are doing.

Editing a single 4k uhd h.264 steam no. If you are working with 8 DNxHR 444 UHD streams in a multicam workflow, you will need every core you can get your hands on.

The big question will be at what core count does the X and WX split take place.

I'd be shocked if the X line actually supports 1TB of memory. Proper support for that much memory will add a lot of cost, and almost no one will need anywhere close to that much memory. Database servers are really the only common use cases that can benefit from that much memory.

The price difference between ECC RDIMM and UDIMM is almost gone at the same speed.
16..32 will probably the X series and 32..64 for WX.
I read a statement from AMD (somewhere) that you can feed around 8..10 cores with 1 memory lane.

I guess will just have to wait and see...

The big question will be at what core count does the X and WX split take place.

I'd be shocked if the X line actually supports 1TB of memory. Proper support for that much memory will add a lot of cost, and almost no one will need anywhere close to that much memory. Database servers are really the only common use cases that can benefit from that much memory.

The price difference between ECC RDIMM and UDIMM is almost gone at the same speed.
16..32 will probably the X series and 32..64 for WX.
I read a statement from AMD (somewhere) that you can feed around 8..10 cores with 1 memory lane.

I guess will just have to wait and see...

I wasn't referring to the actual dims themselves, but the memory controller etc.

To get to 1Tb of memory, you'ed be running 8 128 GB guad rank dims, with two dims on each channel. That will put a lot of load on the memory controller, so it better be up to snuff ($$$).

I wasn't referring to the actual dims themselves, but the memory controller etc.

To get to 1Tb of memory, you'ed be running 8 128 GB guad rank dims, with two dims on each channel. That will put a lot of load on the memory controller, so it better be up to snuff ($$$).

It uses the same memory controller(for WX) as the EPYC 7232P which has a list price of $450, the memory controller is in the 14nm chiplet. The memory controller for the X will probably be defective dies of the WX series.
Leaks recieved by gamersnexus.net indicates the the WX has 8 single memory lanes and the X has 4 dual memory lanes.

I wasn't referring to the actual dims themselves, but the memory controller etc.

To get to 1Tb of memory, you'ed be running 8 128 GB guad rank dims, with two dims on each channel. That will put a lot of load on the memory controller, so it better be up to snuff ($$$).

It uses the same memory controller(for WX) as the EPYC 7232P which has a list price of $450, the memory controller is in the 14nm chiplet. The memory controller for the X will probably be defective dies of the WX series.
Leaks recieved by gamersnexus.net indicates the the WX has 8 single memory lanes and the X has 4 dual memory lanes.

That doesn't mean it will be up to the the task. I've seen a lot of memory controllers have performance issues when you max out the number of dims and the capacity per dim. And just to be clear I have seen this with AMD and Intel, on both consumer and enterprise grade systems.

That doesn't mean it will be up to the the task. I've seen a lot of memory controllers have performance issues when you max out the number of dims and the capacity per dim. And just to be clear I have seen this with AMD and Intel, on both consumer and enterprise grade systems.

AMD stated that the memory controller of the EPYC ROME can handle 80c/160tr.
3200 MHz with 8 single dimm slots and 2933 MHz with 8 dual dimm slots(16 total).
I don't expect any problems and it also has a lot of cache.

64-Core AMD EPYC Rome Achieves World's First Real-Time 8K HEVC Encoding
https://www.tomshardware.com/news/amd-epyc-rome-8k-real-time-encoding,40400.html